Dumping comparator and ALU caches on ARMv8.2-A, ARMv8.4-A, and ARMv8.5-A processors using RAD96 and RAD96M Compositor applications
Dumping comparator and ALU caches on ARMv8.2-A, ARMv8.4-A, and ARMv8.5-A processors using RAD96 and RAD96M Compositor applications
A new milestone has been reached in dumping ARM processor caches with Compositor RAD96. I managed to dump the caches of not only two Android phones on different Mediatek chipsets, but also Apple devices based on A13 Bionic, A14 Bionic and Apple M1 chips, combining them into a single distance-vector routing of the Compositore network. Thus, the Compositore network is evolving into an emergent artificial intelligence capable of auxiliary work in conditions of heavily fragmented networks of large cities. The conducted experiment shows the zonal distribution of reference chains by districts if Compositore servers are installed in them. So, in one area I have a server on a Mac Pro 2,4 that gives out reference chains for trance music, and in another area I have a server on an Apple iMac 24” (Apple M1) that gives out reference chains for techno music. When crossing the districts towards the center, the Apple Watch “My Station” gives out only techno tracks, while, when crossing the border of the districts towards the suburb Apple Watch “My Station” gives me a trance music response, which indicates the success of dumping the caches not only of Intel processors, but also the above-mentioned ARM processors. Such a resultant in scalar processors is caused by converting a vector to a scalar value, even without the need to reset the equipment to factory settings. In fact, in the new version 10.0.0.9 of the Compositor RTOS, it was possible to achieve an online method for flashing comparators and ALU of ARM processors. This became possible due to the scalar unpacking of the vector value in the RAM segment of the device. It is possible to change the scalar by invoking the application, either remotely or locally on the machine. Essentially, you’re calling a specific multiplier value, which, thanks to 128-bit encryption, is very hard to read. Thus, the processor bus multiplier remains unknown even under desktop processor bus conditions, where the bus is selected in the device’s UEFI or BIOS.
